Maven (Malleable Array of Vector-thread ENgines)

In earlier work at MIT, Professor Asanovic's team developed the Scale vector-thread architecture and processor prototype, which combines data-level and thread-level parallel execution models in a single unified architecture. MAVEN is the second-generation vector-thread architecture, designed to scale up to hundreds of execution lanes, and with the goal of providing very high throughput at low energy for a wide variety of parallel applications. MAVEN is based on a new compact lane design, which is replicated to yield a "sea of lanes" execution substrate. At run-time, lanes are ganged together to form variable-sized vector-thread engines, sized to match application needs.