Publication Details
Title: An Architecture for Exploiting Multi-Core Processors to Parallelize Network Intrusion Prevention
Author: V. Paxson, R. Sommer, and N. Weaver
Group: Networking
Date: May 2007
PDF: http://www.icsi.berkeley.edu/pubs/networking/multicore-sarnoff07.pdf
Acknowledgements:
This work was partially supported by funding provided to ICSI through National Science Foundation grants CNS: 0627320 ("Approaches to Network Defense Proven in Open Scientific Environments"); OCI: 0334088 ("Viable Network Defense for Scientific Research Institutions"); and CNS: 0205519 ("Discrete Models & Algorithms in the Sciences"). Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors or originators and do not necessarily reflect the views of the National Science Foundation.
Bibliographic Information:
Proceedings of IEEE Sarnoff Symposium, Princeton, New Jersey, pp. 1-7
Bibliographic Reference:
V. Paxson, R. Sommer, and N. Weaver. An Architecture for Exploiting Multi-Core Processors to Parallelize Network Intrusion Prevention. Proceedings of IEEE Sarnoff Symposium, Princeton, New Jersey, pp. 1-7, May 2007
Author: V. Paxson, R. Sommer, and N. Weaver
Group: Networking
Date: May 2007
PDF: http://www.icsi.berkeley.edu/pubs/networking/multicore-sarnoff07.pdf
Acknowledgements:
This work was partially supported by funding provided to ICSI through National Science Foundation grants CNS: 0627320 ("Approaches to Network Defense Proven in Open Scientific Environments"); OCI: 0334088 ("Viable Network Defense for Scientific Research Institutions"); and CNS: 0205519 ("Discrete Models & Algorithms in the Sciences"). Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors or originators and do not necessarily reflect the views of the National Science Foundation.
Bibliographic Information:
Proceedings of IEEE Sarnoff Symposium, Princeton, New Jersey, pp. 1-7
Bibliographic Reference:
V. Paxson, R. Sommer, and N. Weaver. An Architecture for Exploiting Multi-Core Processors to Parallelize Network Intrusion Prevention. Proceedings of IEEE Sarnoff Symposium, Princeton, New Jersey, pp. 1-7, May 2007
