What I Do

I recently completed my PhD in the Computer Science Division of the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley.  I did my research in the Realization Group at the International Computer Science Institute (ICSI) under the directiion of Prof. Nelson Morgan.  The focus of my research was the development of a front end for the robust automatic recognition of speech in reverberant environments.  This work led to the development of a new speech representation for ASR systems called the modulation-filtered spectrogram (MSG).

In a previous life I was a VLSI designer at ICSI, working on the T0 project.

I now work for IBM.

Where To Reach Me

IBM T. J. Watson Research Center
P. O. Box 218
Yorktown Heights, NY  10598

Tel: +1-914-945-2541
FAX: +1-914-945-4490

bedk@us.ibm.com

Publications

• Perceptually Inspired Signal-processing Strategies for Robust Speech Recognition in Reverberant Environments

B. E. D. Kingsbury
PhD Thesis, University of California at Berkeley, 1998.
Available as PDF.
• Performance improvements through combining phone- and syllable-scale information in automatic speech recognition

S.-L. Wu, B. E. D. Kingsbury, N. Morgan and S. Greenberg
Proceedings of ICSLP, pp. 459-62, 1998.
• Robust speech recognition using the modulation spectrogram

B. E.D. Kingsbury, N. Morgan and S. Greenberg
Speech Communication, 25(1-3):117-32, 1998.
A color version of Figure 2 is available.
• Incorporating information from syllable-length time scales into automatic speech recognition

S.-L. Wu, B. E. D. Kingsbury, N. Morgan and S. Greenberg
Proceedings of ICASSP, pp. 721-4, 1998.
• Training neural networks with SPERT-II

K. Asanovic, J. Beck, D. Johnson, B. Kingsbury, N. Morgan and J. Wawrzynek
Parallel Architectures for Artificial Neural Networks - Paradigms and Implementations, Editors: N. Sundararajan and P. Saratchandran, IEEE Computer Society Press, 1998.
• Recognizing reverberant speech with RASTA-PLP

B. E. D. Kingsbury and N. Morgan
Proceedings of ICASSP, pp. 1259-62, 1997.
• The modulation spectrogram: In pursuit of an invariant representation of speech

S. Greenberg and B. E. D. Kingsbury
Proceedings of ICASSP, pp. 1647-50, 1997.
A color version of Figure 2 is available.
• Improving ASR performance for reverberant speech

B. E. D. Kingsbury, N. Morgan and S. Greenberg
Proceedings of the ESCA Workshop on Robust Speech Recognition for Unknown Communication Channels, pp. 87-90, 1997.
• T0: A single-chip vector microprocessor with reconfigurable pipelines

K. Asanovic, B. E. D. Kingsbury, J. Beck, B. Irissou and J. Wawrzynek
Proceedings of the 22nd European Solid-State Circuits Conference, pp. 344-7, 1996.
• SPERT-II: A vector microprocessor system

J. Wawrzynek, K. Asanovic, B. Kingsbury, J. Beck, D. Johnson and N. Morgan
IEEE Computer, 29(3):79-86, 1996.
Copyright © 1996 Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Personal use permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE. For information on obtaining permission, send a blank email message to info.pub.permission@ieee.org.
• SPERT-II: A vector microprocessor system and its application to large problems in backpropagation training

J. Wawrzynek, K. Asanovic, B. E. D. Kingsbury, J. Beck, D. Johnson and N. Morgan
Advances in Neural Information Processing Systems 8, pp. 619-25, 1995.
• The T0 vector microprocessor

K. Asanovic, J. Beck, B. Irissou, B. E. D. Kingsbury, N. Morgan and J. Wawrzynek
Proceedings of Hot Chips VII, 1995.
• CNS-1 Architecture Specification  (Abstract)

K. Asanovic, J. Beck, J. A. Feldman, B. Irissou, B. E. D. Kingsbury, P. Kohn, J. Lazzaro, N. Morgan, D. Stoutamire and J. Wawrzynek
International Computer Science Institute Technical Report, TR-93-021, 1993.
• SPERT: A Neuro-Microprocessor

K. Asanovic, J. Beck, B. E. D. Kingsbury, P. Kohn, N. Morgan and J. Wawrzynek
Proceedings of the 3rd International Workshop on VLSI for Artificial Intelligence and Neural Networks, 1992.
• SPERT: A VLIW/SIMD microprocessor for artificial neural network computations

K. Asanovic, J. Beck, B. E. D. Kingsbury, P. Kohn, N. Morgan and J. Wawrzynek
Proceedings of the International Conference on Application Specific Array Processors, pp. 178-90, 1992.
• SPERT: A VLIW/SIMD neuro-microprocessor

K. Asanovic, J. Beck, B. E. D. Kingsbury, P. Kohn, N. Morgan and J. Wawrzynek.
Proceedings of the International Joint Conference on Neural Networks, pp. 577-82. 1992.
• Using VOV, an automated design manager, in a VLSI design course

A. Casotto, B. Kingsbury and J. Wawrzynek
Microelectronic System Education Conference and Exposition, 1991.
• Recent Work in VLSI Elements for Digital Implementations of Artificial Neural Networks  (Abstract)

B. E. D. Kingsbury, B. Irissou, K. Asanovic, J. Wawrzynek and N. Morgan
International Computer Science Institute Technical Report, TR-91-074, 1991.
• HiPNeT-1: A highly pipelined architecture for neural network training

K. Asanovic, B. E. D. Kingsbury, N. Morgan and J. Wawrzynek
IFIP Workshop on Silicon Architectures for Neural Nets, pp. 217-32, 1991.
• Developments in Digital VLSI Design for Artificial Neural Networks (Abstract)

N. Morgan, K. Asanovic, B. E. D. Kingsbury and J. Wawrzynek
International Computer Science Institute Technical Report, TR-90-065, 1990.